搜索资源列表
RS232
- FPGA实现RS-232串口收发的Verilog程序,已经调通。
my_232
- verilog 232串口收发程序 在开发板上测试成功过-verilog 232 serial port transceiver program already had some success in the development of on-board test ^ ^
Verilog_PS2_RS232
- 实现PS/2接口与RS-232接口的数据传输, PS/2键盘上按下按键,可以通过RS-232自动传送到主机的串口调试终端上,并在数据接收区显示接收到的字符。 串口调试终端的设置:波特率115200,一个停止位,无校验位。 -The realization of PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmissi
RS_Verilog
- RS码的FPGA实现,verilog语言形式,好参考资料-FPGA realization of RS code, verilog language form, a good reference
serialcomuniactionsource_files
- 用于FPGA与232通信的编程设计,用VERILOG语言编写的,在ISE中仿真-232 communications for FPGA programming and design, using the VERILOG language in ISE Simulation
uart
- 本程序的功能是实现串口通信,采用232传输协议,编码方式为8B/10B转换,即一位起始位,8位数据位,一位停止位,在actel Fusion系列开发板上得到验证,具有很强的通用性。本程序的编程语言为Verilog.-This procedure is to achieve the functions of serial communication, the transfer protocol is 232.The encoding protocol is 8B/10B , that is, a
c_FPGA
- RS232设计,硬件测试通过,VERILOG实现的,比较好的哦-RS232 design, hardware test, VERILOG realized, oh good
RS-232
- 串口通信模块Verilog代码及相关文档-Serial communication module Verilog code and related documentation
uart
- 232串口,我见过的最好的一个VERILOG描述的串口程序-232, one of the best I' ve ever seen descr iption of the serial program VERILOG
RS-232
- verilog实现RS-232串口通信,经过功能仿真,完全能够行得通。-realise RS-232 by using verilog HDL
Proj
- verilog/vhdl 串行口232通信程序-Spartan3E开发板调试通过-verilog/vhdl serial port communication program-Spartan3E 232 development board debugging
example1
- verilog 实现串口通信,其主要针对于uart异步232串口通信,经过硬件验证,其包含众多黑金开发板例程-verilog and uart
verilog-uart
- UART(Universal Asynchronous Receiver Transmitter,通用异步收发器)是广泛使用的异步串行数据通信协议。下面首先介绍UART硬件接口及电平转换电路,分析UART的传输时序并利用Verilog HDL语言进行建模与仿真,最后通过开发板与PC相连进行RS-232通信来测试UART收发器的正确性。-UART (Universal Asynchronous Receiver Transmitter, Universal Asynchronous Receive
UART_RX
- 232串口源程序 verilog实现,频率可调 接受部分-RS232 verilog
uart_verilog
- 232串口Verilog语言实现,可供新手参考编写,不太完善,需做补充。-Uart 232 Verilog
1---Serial-interface-(RS-232)
- Verilog HDL编写的RS232通信接口,包含RS232接口通信原理解析和编程实现文档-Verilog HDL prepared by the RS232 communication interface, including RS232 interface communication principles of parsing and programming documents
232
- FPGA中实现232串口数据的发送,采用Verilog语言编辑,简单方便,易理解-FPGA to realize sending 232 data, using Verilog language editing, simple, easy to understand
txd_control
- uart串口发送控制模块 适合于485 422 232等接口-uart TXD——contrl Verilog
基于FPGA的串口通信系统
- 该设计是基于 FPGA 的串口通信系统模拟仿真,通过对 RS-232 串行总线 接口的设计,掌握发送与接收电路的基本思路,并进行串口通信。采用 Verilog HDL 语言对 UART 波特率产生模块、数据发送模块、接收模块进行硬件描述, 再将其整合为一个 RS-232 收发模块,最终在顶层模块中将两个 RS-232 模块例 化,实现两块 FPGA 芯片全双工通信的设计。(Design of serial communication system based on FPGA)
uart_test
- 用verilog实现的一款232协议的源码,支持光纤传输,IO通道传输等等传输方式。(Verilog implementation of a 232 protocol source code, support fiber transmission, IO channel transmission and so on transmission.)